首页|Depth estimation system suitable for hardware design
Depth estimation system suitable for hardware design
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Depth estimation is an active research area with the developing of stereo vision in recent years.It is one of the key technologies to resolve the large data of stereo vision communication.Now depth estimation still has some problems,such as occlusion,fuzzy edge,real-time processing,etc.Many algorithms have been proposed base on software,however the performance of the computer configurations limits the software processing speed.The other resolution is hardware design and the great developments of the digital signal processor (DSP),and application specific integrated circuit (ASIC) and field programmable gate array (FPGA) provide the opportunity of flexible applications.In this work,by analyzing the procedures of depth estimation,the proper algorithms which can be used in hardware design to execute real-time depth estimation are proposed.The different methods of calibration,matching and post-processing are analyzed based on the hardware design requirements.At last some tests for the algorithm have been analyzed.The results show that the algorithms proposed for hardware design can provide credited depth map for further view synthesis and are suitable for hardware design.
3-D TV (3DTV)depth estimationhardware designrank transformcensus transform
LI He-jian、ZUO Yi-fan、YANG Gao-bo、AN Ping、WANG Jian-wei、TENG Guo-wei
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Key Laboratory of Advanced Display and System Application(Shanghai University), Ministry of Education, Shanghai 200072, P. R. China
College of Computer and Communication, Hunan University, Changsha 410082, P. R. China
School of Communication and Information Engineering, Shanghai University, Shanghai 200072, P. R. China
国家自然科学基金Key Laboratory of Advanced Display and System Applications (Shanghai University),Ministry of Education,ChinatheScience and Technology Commission of Shanghai Municipality
NETL
NSTL
万方数据
维普
