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Searching for complete set of free resource rectangles on FPGA area based on CPTR

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As a coprocessor,field-programmable gate array(FPGA)is the hardware computing processor accelerating the computing capacity of computers.To efficiently manage the hardware free resources for the placing of tasks on FPGA and take full advantage of the partially reconfigurable units,good utilization of chip resources is an important and necessary work.In this paper,a new method is proposed to find the complete set of maximal free resource rectangles based on the cross point of edge lines of running tasks on FPGA area,and the prove process is provided to make sure the correctness of this method.

field-programmable gate array(FPGA)partially dynamic reconfiguremaximal free rectangleoccupied rectangle

CHAI Ya-hui、SHEN Wen-feng、XU Wei-min、LIU Jue-fu、ZHENG Yan-heng

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School of Computer Engineering and Science, Shanghai University, Shanghai 200072, P.R.China

School of Information Engineering, East China Jiaotong University, Nanchang 330013, P.R.China

Shanghai Leading Academic Discipline ProjectNatural Science Foundation of Jiangxi ProvinceScience Technology Project of Jiangxi Province

J501032010GZS00312010BGB00604

2011

10.1007/s11741-011-0757-2

上海大学学报(英文版)
上海大学

上海大学学报(英文版)

影响因子：0.196
ISSN：1007-6417
年,卷(期)：2011.15(5)
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