Doped low-density parity-check codes

Yong Li ¹Rui Liu ¹Xianlong Jiao ¹Youqiang Hu ²Zhen Luo ³Francis C.M.Lau⁴

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作者信息

1. College of Computer Science,Chongqing University,Chongqing,400044,China
2. School of Automation,Chongqing University,Chongqing,400044,China
3. College of Electronic and Information Engineering,Southwest University,Chongqing,400715,China
4. Future Wireless Networks and IoT Focusing Area,Department of Electronic and Information Engineering,Hong Kong Polytechnic University,Hong Kong,China
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Abstract

In this paper,we propose a doping approach to lower the error floor of Low-Density Parity-Check(LDPC)codes.The doping component is a short block code in which the information bits are selected from the coded bits of the dominant trapping sets of the LDPC code.Accordingly,an algorithm for selecting the information bits of the short code is proposed,and a specific two-stage decoding algorithm is presented.Simulation results demonstrate that the proposed doped LDPC code achieves up to 2.0 dB gain compared with the original LDPC code at a frame error rate of 10-6.Furthermore,the proposed design can lower the error floor of original LDPC codes.

Key words

LDPC codes/Doped LDPC codes/Tanner graph/Quadratic residue codes/Trapping sets

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基金项目

NSF(61771081)

NSF(62072064)

中央高校基本科研业务费专项(cstc2019jcyjmsxmXO110)

Project of Chongqing Natural Science Foundation(CSTB2022NSCQ-MSX0990)

Science and Technology Research Project of Chongqing Education Commission(KJQN202000612)

Venture and Innovation Support Program for Chongqing Overseas Returnees(cx2020070)

出版年

2024

数字通信与网络(英文)

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参考文献量35

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