FPGA Anti-radiation and Fault Tolerance Method Based on Improved Quasi-cyclic Code
A(16,8)quasi-cyclic code fault-tolerant method based on improved bit interleaving technology was proposed to address the issue of single event multiple bits upset in SRAM type FPGAs susceptible to high-ener-gy particles in radiation environments.Based on the analysis of typical multiple bits upset error patterns in FP-GA,this article combined traditional(16,8)quasi-cyclic codes with improved bit interleaving technology to im-prove the soft fault tolerance of encoding and decoding using error detection and correction ideas in soft fault tol-erance.Simulation and hardware platform experiments showed that this method could correct up to five bits burst errors and detect two bits random errors caused by single particle effects in FPGA.It also had the charac-teristics of encoding and decoding without additional redundant bits,simple implementation,and strong fault tolerance,which provided a feasible approach to enhance the single event overturning resistance of SRAM type FPGAs in the application process and improve the irradiation reliability of related systems.
SRAM type FPGAsmultiple bits upsetimproving quasi-cyclic codeserror detection and correction
万方数据
维普
