首页|基于FPGA的异步双端口RAM芯片原型验证研究

基于FPGA的异步双端口RAM芯片原型验证研究

Research on FPGA-Based Prototyping of Asynchronous Dual-Port RAM Chip

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为保证芯片功能符合预期,提高流片成功率,异步双端口RAM芯片设计在流片前进行充分的功能验证,其中FPGA原型验证能够重现芯片的实际工作环境,以此验证芯片设计的有效性.基于FPGA的异步双端口RAM芯片原型验证根据芯片定义,选择使用Intel公司的10M40DCF256 FPGA为核心硬件搭建FPGA原型验证平台,在平台上通过完成从ASIC到FPGA的代码移植实现芯片原型,然后根据设计需求编写测试程序实现对该芯片的FPGA原型验证.测试结果均符合预期,表明异步双端口RAM芯片的功能符合设计需求,避免项目时间和资金成本的额外增加.
To ensure that the chip functions meet the expectations and to improve the success rate of tape out,the asynchronous dual-port RAM chip needs to be fully functionally verified before tape out.In this case,FPGA prototyping can simulate the actual working environment of the chip to verify the chip design.This paper presents the FPGA-based prototyping of the asynchronous dual-port RAM chip,which considers the chip definition and selects Intel 10M40DCF256 FPGA as the core hardware to build an FPGA prototyping platform.On this platform,the chip prototype is realized by porting ASIC codes to FPGA,and then the FPGA prototyping of the chip is achieved by preparing test programs according to the design requirements.The test results meet the expectations,and indicate that the functions of the asynchronous dual-port RAM chip meet the design requirements,thus avoiding the additional increase of project time and capital cost.

asynchronous dual-port RAM chipFPGAprototyping

巩京爽、靳旭、武方达、林子明、刘光宇

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北京全路通信信号研究设计院集团有限公司,北京 100070

列车自主运行智能控制铁路行业工程研究中心,北京 100070

异步双端口RAM芯片 FPGA 原型验证

国家工业和信息化部2021年产业技术基础公共服务平台项目

2021-0162-2-1

2024

铁路通信信号工程技术
北京全路通信信号研究设计院有限公司

铁路通信信号工程技术

影响因子:0.313
ISSN:1673-4440
年,卷(期):2024.21(9)
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