面向软件定义互连系统的多协议交换电路
Multi-protocol switching circuit for software defined interconnection system
董春雷 1沈剑良 1李沛杰 1王盼 2薄光明 3路凯1
作者信息
- 1. 信息工程大学,河南 郑州 450002
- 2. 天津市滨海新区信息技术创新中心,天津 300457
- 3. 天津职业技术师范大学国有资产管理处,天津 300222
- 折叠
摘要
为满足软件定义互连系统中异构协议融合互连的需求,提出一种两级多协议交换电路,该电路通过融合共享缓存与Crossbar这2种交换架构,实现对多种异构协议的报文转发需求的兼顾.同时,提出一种基于时隙的多级仲裁调度方法,实现调度过程中时间与空间的解耦.仿真结果表明,所设计的交换电路能够弹性适应绑定模式变化引起的交换规模及端口缓存、端口带宽需求变化,缓存资源利用率相较传统组合输入输出排队(CIOQ)架构最高提高87.5%,转发时延低至数十纳秒,不仅适用于RapidIO、光纤通道(FC)、Ethernet、外设部件互连快速总线(PCIe)单一协议交换,而且适用于多种协议组合的混合协议交换.
Abstract
In order to meet the requirements of heterogeneous protocol integration and interconnection in software-defined interconnection systems,a two-stage multi-protocol switching circuit was proposed.This circuit accommodated the forwarding needs of various heterogeneous protocols by integrating shared memory and Crossbar architectures.In addition,a multi-stage arbitrary scheduling scheme based on time slot was introduced to decouple time and space during the scheduling.Simulation results demonstrate that this switching circuit can dynamically adapt to changes in switching scale,port memory,and port bandwidth requirements resulting from binding mode changes.Compared to traditional combined input and output queued(CIOQ)architecture,the utilization of memory is increased by up to 87.5%,and the forwarding delay is as low as tens of nanoseconds,making it suitable for RapidIO,fibre channel(FC),Ethernet,periph-eral component interconnect express(PCIe)single protocol switching as well as hybrid protocol switching combining these protocols.
关键词
软件定义互连/异构协议/交换结构/时分复用/通道绑定/缓存利用率Key words
software defined interconnection/heterogeneous protocol/switching architecture/time division multiplexing/channel binding/memory utilization引用本文复制引用
基金项目
国家重点研发计划(2022YFB2901000)
出版年
2024
国家科技期刊平台
NSTL
万方数据