Dual NMOS Buck DC-DC Converter Based on Time Control Technology
In order to effectively reduce system power consumption,a buck DC-DC converter based on time control is designed.The system architecture takes time as the processing variable and uses CMOS digital signals without increasing any quantization error.In the integrator design,a ring oscillator is used instead of the traditional operational amplifier to effectively reduce power consumption.A delay line is added to realize the conversion and summation of voltage to time,and then a simple trigger is used to generate PWM modulation signal.The design is based on time control,which eliminates the need for pulse width modulator in high-bandwidth error amplifier and analog controller,and the need for high-resolution ADC in digital control,and has the advantages of both digital and analog control.The test shows that the overall architecture of the design can be controlled only by using 7.6 μA static current.
Buck circuitDC-DC converterLow power consumptionTime control technology
万方数据
维普
