Design of a Fast Start Charge Pump for Antifuse FPGA
Traditional Dickson structure charge pumps suffer from slow rise times,which can hinder the performance of antifuse FPGAs in user mode and lead to timing issues.To address these limitations,a rapid-boot charge pump circuit is proposed,building upon the traditional Dickson structure.The enhanced design incorporates a clock signal enhancement circuit and a 0 V generation circuit alongside the standard oscillator,non-overlapping clock generation circuit,and main charge pump circuit.The clock signal en-hancement circuit expedites charge transfer,enabling rapid charge pump boost.The 0 V generation circuit effectively isolates the high-voltage module from the low-voltage module,providing circuit protection during programming mode.Simulation experiments conducted under global equivalent load conditions,based on CMOS technology,demonstrate that the improved charge pump achieves a stable output 57.6%faster than the original design.Actual chip fabrication and circuit function testing confirm the successful implementation of the proposed design.
Charge pumpClock signal enhancement circuitAntifuse FPGARapid boot
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