Design of a High-Precision Sigma-Delta ADC Using Mash2-1 Architecture
In view of the critical role of analog-to-digital converter(ADC)in the field of chip and mixed-signal processing,a sigma-delta ADC based on Mash2-1 cascade architecture is designed to explore the possibility of further improving the accuracy of ADC and meet the new requirements of contemporary application systems.TSMC 180nm CMOS process is adopted in the design.While completing the modulator circuit,Verilog code is used to realize the matching error elimination and digital decimation filter.The modulator is modeled and the non-ideal factors are analyzed,and the non-ideal of the circuit is optimized by using chopper modulation technology.The simulation results show that the design has excellent signal-to-noise ratio and ideal performance indexes such as total harmonic distortion under 3.3 V power supply,27℃working environment and TT typical process conditions,and is suitable for high-precision and low-distortion applications.
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