一种高精度低噪声低压差线性稳压器电路
A High-Precision Low-Noise Low-Dropout Linear Regulator Circuit
张荠 1王莉 1刘盛意 1张锡来 1卢展鹏 1陈丽媛1
作者信息
- 1. 大连东软信息学院智能与电子工程学院,辽宁大连 116023
- 折叠
摘要
在现有产品基础上加以改进,设计一种高精度低噪声低压差线性稳压器电路.设计采用折叠式共源共栅结构放大器来降低噪声,提高增益;使用PMOS管代替过热保护电路中的电阻,降低功耗,同时采用栅极驱动结构以及电流控制方式实现开关管导通与关断.基于TSMC 0.35 µmB iCMOS工艺结合Cadence软件进行设计、版图绘制和前、后仿真,在后仿真中得出相关参数值.对各参数做出详细分析,并对不同频率下的电源电压抑制比进行了对比.实验结果表明本设计达到了高精度低功耗的设计目标.
Abstract
Based on the existing products,a high-precision,low-noise and low-dropout linear voltage regulator circuit is designed.A folded cascode amplifier is designed to reduce noise and improve gain.The PMOS transistor is used to replace the resistor in the overheat protection circuit,which reduces the power consumption.At the same time,the gate drive structure and current control mode are used to realize the turn-on and turn-off of the switch tube.Based on TSMC 0.35 μm BiCMOS process and Cadence software,the design,layout drawing and pre-and post-simulation are carried out,and the relevant parameter values are obtained in the post-simulation.The parameters are analyzed in detail,and the power supply voltage rejection ratio at different frequencies is compared.The experimental results show that the design has achieved the design goal of high precision and low power consumption.
关键词
低压差线性稳压器/放大器/过热保护/电源电压抑制比Key words
LDO/Amplifier/Over heat protection/Supply voltage rejection ratio引用本文复制引用
出版年
2024
NETL
NSTL
万方数据