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具有低EMI和低开启损耗的浮空P区IGBT研究

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为了优化浮空P区IGBT结构的电磁干扰噪声(EMI)与开启损耗(Eon)的折中关系,提出一种假栅沟槽连接多晶硅阻挡层的浮空P区IGBT结构.新结构在浮空P区内引入对称的两个假栅沟槽,并通过多晶硅层连接.假栅沟槽将浮空P区分为三部分,减少了栅极沟槽附近的空穴积累,降低了栅极的固有位移电流.二维结构仿真表明,在小电流开启时,该结构与传统结构相比,栅极沟槽空穴电流密度减小90%,明显降低了集电极电流(ICE)过冲峰值和栅极电压(VGE)过冲峰值,提高了栅极电阻对dICE/dt和dVKA/dt的控制能力.在相同的开启损耗下,新结构的dICE/dt、dVCE/dt 和 dVKA/dt 最大值分别降低 32.22%、38.41%和 12.92%,降低了器件的 EMI 噪声,并改善了器件EMI噪声与开启损耗的折中关系.
Study on a Floating P-Base IGBT with Low EMI and Turn-On Losses
To optimize the trade-off relationship between EMI and E on for the floating P-base IGBT structure,a floating P-base IGBT structure with a dummy gate trench connected to a poly barrier layer was proposed.Two symmetrical dummy gate trenches were introduced in the floating P-base of the new structure,which were connected to each other by polysilicon.The dummy gate trenches divided the floating P-base into three parts,which decreased the number of holes accumulated near the gate trench and the inherent gate displacement current.The simulation results of the two-dimensional structure show that,compared with conventional IGBT,the proposed structure's hole current density near the gate trench is reduces by 90%at low turn-on current.This reduction significantly reduces the peak values of collector current overshoot(ICE)and gate voltage overshoot(VGE),thereby improving the control capability of the gate resistance at dICE/dt and dVKA/dt.For the same turn-on loss,the maximum values of dICE/dt,dVCE/dt and dVKA/dt in the new structure are reduced by 32.22%,38.41%and 12.92%respectively,thus reducing EMI noise and improving the trade-off between EMI noise and turn-on loss of the device.

floating P-baseelectromagnetic interference noiseturn-on energy lossessmall currentinherent displacement current

肖蝶、冯全源、李嘉楠

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西南交通大学微电子研究所,成都 611756

浮空P区 电磁干扰噪声 开启损耗 小电流 固有位移电流

国家自然科学基金四川省重点研发计划

620900122023YFG0004

2024

微电子学
四川固体电路研究所

微电子学

CSTPCD北大核心
影响因子:0.274
ISSN:1004-3365
年,卷(期):2024.54(1)
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