Low-Noise Analog Front-End Circuit Design for 80 Gbit/s PAM4 Signal Optical Receiver
A low-noise analog front-end circuit(AFE)was designed using UMC 28 nm CMOS technology for optical receivers operating at 80 Gbit/s PAM4.To address the tradeoff between the noise and bandwidth,we adopted a trans-impedance amplifier(TIA)cascaded continuous time linear equalizer(CTLE)and input inductor peaking.A VGA with trans-conductance and a trans-impedance(gm-TIA)structure was adopted to effectively control the low-frequency gain and further expand the bandwidth.The circuit achieves a trans-impedance gain of 48.5 dBΩ,a bandwidth of 36.1 GHz,an average equivalent input current noise of 22.6 pA/√Hz,and a power consumption of 14.5 mW,under the conditions of an input capacitance of 100 fF and a supply voltage of 1.2 V.
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