一种支持SoC数字电路老化及寿命的评估方法
An Evaluating Method for the Aging and Lifetime of SoC Digital Circuits
陈朝晖 1张弛 1刘玮 2宋玉祥 3刘潇骁 3唐诗怡3
作者信息
- 1. 中国南方电网电力调度控制中心,广州 510530
- 2. 广东电网电力调度控制中心,广州 510285
- 3. 飞腾(长沙)信息技术有限公司,长沙 410000
- 折叠
摘要
使用Spice可靠性仿真技术和高温稳态寿命(HTOL)实验相结合的方法,研究不同的MOSFET器件组成的环振电路在持续翻转状态下,不同应力时间和应力电压对其寿命退化的影响.依据仿真结果和Power-Law模型建立数字电路的寿命预测理论模型.通过HTOL实验验证模型的准确性.结果表明,随着时间的增加,器件的寿命退化率逐渐增加,且随着时间的推移,寿命的变化率越来越小.随着应力电压的增加,器件的寿命退化率更快趋向于稳定.器件退化符合R-D模型,仿真结果与试验结果高度,进一步证实了本模型对SoC数字电路寿命预测的准确性.通过这种组合仿真和实验的方法,可以更加准确地评估数字电路的寿命,为芯片制造过程中的可靠性设计提供参考.
Abstract
In this paper,we use Spice reliability simulation technology and HTOL experiments to investigate the lifetime of oscillation circuit composed of different MOSFET devices.The effects of different stress times and stress voltages on the degradation of the digital circuit lifetime under continuous switching state of the devices are studied.Based on the simulation results and the Power-Law model,a theoretical model for predicting the lifetime of digital circuits is established.The accuracy of the model is verified through HTOL experiments.The results show that as time increases,the degradation rate of devices lifetime gradually increases,and the rate of change in lifetime becomes smaller with time goes on.Moreover,with the increase of stress voltage,the degradation rate of device lifetime tends to stabilize faster.The device degradation conforms to the R-D model,and the simulation results highly coincide with the experimental results,further confirming the accuracy of this model in predicting the lifetime of SoC digital circuits.Through this combined simulation and experimental method,the lifetime of digital circuits can be evaluated more accurately,providing references for the reliability design in the industrial application.
关键词
SoC数字电路/环振电路/Spice仿真/Power-Law模型/R-D模型/高温稳态寿命Key words
SoC digital circuit/ring oscillation circuit/power-law model/R-D model/HTOL引用本文复制引用
基金项目
南方电网公司重点科技项目(ZDKJXM20200056)
出版年
2024
NETL
NSTL
万方数据