An Evaluating Method for the Aging and Lifetime of SoC Digital Circuits
In this paper,we use Spice reliability simulation technology and HTOL experiments to investigate the lifetime of oscillation circuit composed of different MOSFET devices.The effects of different stress times and stress voltages on the degradation of the digital circuit lifetime under continuous switching state of the devices are studied.Based on the simulation results and the Power-Law model,a theoretical model for predicting the lifetime of digital circuits is established.The accuracy of the model is verified through HTOL experiments.The results show that as time increases,the degradation rate of devices lifetime gradually increases,and the rate of change in lifetime becomes smaller with time goes on.Moreover,with the increase of stress voltage,the degradation rate of device lifetime tends to stabilize faster.The device degradation conforms to the R-D model,and the simulation results highly coincide with the experimental results,further confirming the accuracy of this model in predicting the lifetime of SoC digital circuits.Through this combined simulation and experimental method,the lifetime of digital circuits can be evaluated more accurately,providing references for the reliability design in the industrial application.
SoC digital circuitring oscillation circuitpower-law modelR-D modelHTOL
NETL
NSTL
万方数据
