A capacitor-less low dropout regulator design with double-loop and fast transient response
In view of the disadvantage of traditional low-voltage differential linear voltage regulator(LDO)requiring large external capacitors,a double loop fast transient response LDO circuit without external capacitors was designed based on standard CMOS technology of 180 nm.The circuit uses Miller compensation and composite transistor technology to ensure the stability of LDO under different load current conditions.This circuit uses pole splitting technology to ensure the stability of LDO under different load currents.At the same time,the transient enhancement circuit is used to detect the voltage fluctuation of the output terminal to provide additional charging and discharging circuit for the power tube grid,which reduces the upshot and downshot voltage of the LDO output terminal.In addition to the traditional analog loop,a digital loop is added to increase the maximum load current of LDO significantly.The simulation results show that when the supply voltage is 1.8 V and the output voltage is 1.5 V,the maximum load current of the LDO is 275 mA and the no-load static current is 39 μA.When the load current ranges from 1 to 250 mA and the time jumps from 1 μs,the upstroke voltage is 66 mV and the downstroke voltage is 77 mV.The load capacity and transient response performance are significantly improved due to the dual loop circuit.
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维普
