Design of a charge pump type DC-DC power management chip
In order to improve the efficiency and output voltage stability of the power management chip,it is necessary to reduce voltage loss,load adjustment rate and linear adjustment rate.A charge pump DC-DC power management chip is designed by using 2 μm-36 V bipolar technology of CSMC.Employing the H-bridge topology,the type and quantity of power tubes are adjusted to curtail voltage loss.By not adopting PFM,PSM,and PWM modulation modes,not only is the circuit complexity reduced,but also the drawbacks of the aforementioned modulation modes are circumvented.A band-gap reference module without op AMP is designed,which not only has no offset voltage but also reduces the layout area.The temperature drift coefficient is 144.4 ppm/℃ to offset the temperature drift generated by the error amplifier network.The designed RC oscillator is different from the traditional RC oscillator,and its frequency is more stable.The designed error amplifier does not adopt the traditional two-stage differential transconductance operational amplifier structure,the circuit structure is simple,and the phase margin is 62.81°.The optimized oscillator module reduces the voltage loss,and the optimized band-gap reference module and error amplifier module reduce the load adjustment rate and linear adjustment rate.The simulation results show that when the temperature is-55℃～125℃,the input voltage is 3.5～15.0 V,and the output current is 10～100 mA,the voltage loss is 0.334～1.220 V.When the input voltage ranges from 7 V to 12 V,the maximum linear adjustment ratio is 0.34％,and the maximum load adjustment ratio is 0.9％.
power managementcharge pumpband gap referenceerror amplifyoscillator
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