应用于锂电池SOC估计的PCNN_LSTM硬件加速器设计

Design of PCNN_LSTM hardware accelerator for SOC estimation of lithium batteries

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中文摘要：为了克服传统的锂电池状态估计效果差、计算效率低和能效低等问题,提出一种应用于锂电池荷电状态(State of Charge,SOC)估计的PCNN_LSTM算法与硬件加速器设计.该算法结合了卷积神经网络和长短期记忆神经网络的特点,可以提取输入数据的空间特征和时间特征,从而实现更准确的估计效果.为了进一步提高计算效率,设计了基于现场可编程逻辑门阵列(FPGA)的硬件加速器.该加速器利用FPGA的并行计算和片上存储特性,通过并行流水和模块折叠复用的方式来优化卷积运算和矩阵乘法,采用分段线性拟合和移位的方式实现激活函数模块,以及采用分时复用策略实现element_wise模块.在保证精度的同时,有效减少了硬件资源的消耗,提高了整体性能.实验结果表明,在Zynq UltraScale+MPSoC ZCU102 FPGA上实现了一个输入时钟频率为 100 MHz的PCNN-LSTM加速器,其峰值吞吐量为 75.84 GOP/s,能效比为 60.915 GOP/W.

外文摘要：In order to overcome the problems of poor effect,low computational efficiency and low energy efficiency of traditional state estimation of lithium batteries,a PCNN_LSTM algorithm and hardware accelerator design for State of Charge,SOC)estimation of lithium batteries are proposed.The algorithm combines the characteristics of convolutional neural network and long-term and short-term memory neural network,and can extract the spatial and temporal characteristics of input data,thus achieving more accurate estimation results.In order to further improve the computational efficiency,a hardware accelerator based on field programmable gate array(FPGA)is designed.The accelerator utilizes the parallel computing and on-chip storage characteristics of FPGA,optimizes convolution operation and matrix multiplication by parallel pipelining and module folding reuse,realizes activation function module by piecewise linear fitting and shifting,and realizes element_wise module by time-sharing reuse strategy.While ensuring the accuracy,it effectively reduces the consumption of hardware resources and improves the overall performance.The experimental results show that a PCNN-LSTM accelerator with an input clock frequency of 100 MHz is implemented on ZNQ Zynq UltraScale+MPSoC ZCU102 FPGA,with a peak throughput of 75.84 GOP/s and an energy efficiency ratio of 60.915 GOP/W.

外文关键词：

lithium batterystate of chargeconvolutional neural networklong-term and short-term memory neural networkFPGAhardware acceleration

作者：

王巍、夏旭、丁辉、吴浩、郭家成

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作者单位：

重庆邮电大学光电工程学院/国际半导体学院,重庆 400065

关键词：

锂电池荷电状态卷积神经网络长短期记忆神经网络 FPGA 硬件加速

基金：

重庆市科技局科技重大专项重庆市科技局科技重大专项

项目编号：

cstc2018jszxcyztzx0211cstc2018jszxcyztzxX0054

出版年：

2024

DOI：

10.19304/J.ISSN1000-7180.2023.0713

微电子学与计算机

中国航天科技集团公司第九研究院第七七一研究所

微电子学与计算机

CSTPCD

影响因子：0.431

ISSN：1000-7180

年,卷(期)：2024.41(10)