A real-time super-resolution reconstruction algorithm circuit design based on FPGA
Super-resolution reconstruction is a technology that can increase image resolution and has been widely applied in fields such as surveillance security and game rendering.At present,specific circuit implementation of this technology has high hardware requirements and utilizes a large amount of computing resources.In order to solve the demand of computing power,a super-resolution reconstruction circuit is proposed based on the improved bicubic interpolation algorithm and the improved Laplace algorithm,which can enlarge low-resolution images with a resolution of 960×540 to 3 840×2160.By both a self-built dataset and the X4K1000FPS dataset,the proposed algorithm is evaluated from both subjective and objective perspectives.Furtherly,the board-level verification is carried out on an FPGA development board with XC7Z020-2CLG400l chip.Experimental results show that the proposed circuit takes about 32.7 ms to process an image at a working frequency of 167 MHz,and the processing speed can reach about 30 frames/s,which meets real-time processing,the calculation speed is 4 times that of one PC software with high efficiency.
万方数据
维普
