Design of SCL Decoder Based on Non-uniform Quantized Polarization Code of FPGA
In order to solve the problem of large storage resource consumption and high wiring delay in the existing uniformly quan-tized Successive Cancellation List(SCL)decoding algorithms,a SCL decoding algorithm using 5 bit non-uniform quantization scheme is proposed.The algorithm retains the iterative calculation method of Log-Likelihood Ratio(LLR)in uniform quantization,adopts 5 bit non-uniform quantization of LLR,and designs a Look-Up Table(LUT)in the LLR calculation module to convert to 6 bit uniformly quantized LLR for calculation.Simulation results show that compared with the 6 bit uniformly quantized SCL decoder,the performance loss of Frame Erasure Rate(FER)frame error rate is less than 0.1 dB when the bitrate R=1/2 list width L=2 and L=4 are used.In terms of hardware resource consumption,compared with the 6 bit uniform quantization decoder,the Flip-Flop(FF)and Block Random Access Memory(BRAM)storage resource consumption of the 5 bit non-uniform quantization scheme decoder are reduced by 10.9%and 22%,respectively,and the throughput is increased by24%when L=2.At L=4,FF and BRAM decreased by10%and18.1%,respec-tively,and throughput increased by 17.5%.
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