基于2n-1长m序列的FHT运算及FPGA实现
FHT operation and FPGA implementation based on 2n-1 m sequence
张庆业 1王力男 1周微1
作者信息
- 1. 中国电子科技集团公司第五十四研究所,河北 石家庄 050081
- 折叠
摘要
在地面4G/5G移动通信中辅同步信号(Secondary Synchronization Signal,SSS)都由长为31 和127 的小m序列组成,在求最大相关值运算中通常都采用快速哈达码变换(Fast Hadamard Transform,FHT)来减少计算量、降低运算资源的使用,但是对于任意长序列的FHT推导没有扩展描述.文章针对基于2n-1任意长度的小m序列到FHT运算的行列变换过程给出了完整的矩阵推导,并利用长为3 的小m序列进行仿真验证结论的正确性,最后以5G标准中长度为127 的SSS序列完成FHT的FPGA实现.
Abstract
In the ground 4G/5G mobile communication,the Secondary Synchronization Signal(SSS)is composed of small m sequences with length of 31 and 127,and Fast Hadamard Transform(FHT)is usually used to reduce the amount of computation and reduce the use of computation resources in the calculation of maximum correlation value,however,there is no extended description for FHT derivation of sequences of any length.In this paper,a complete matrix derivation is given for the row-column transformation process from small m sequence of arbitrary 2n-1 length to FHT operation,and the small m sequence with length of 3 is adopted for simulation to verify the correctness of the conclusion.Finally,the FPGA implementation of FHT is completed by utilizing the SSS sequence with the length of 127 in the 5G standard.
关键词
辅同步信号/快速哈达码变换/m序列/FPGAKey words
Secondary Synchronization Signal/Fast Hadamard Transform/m sequence/FPGA引用本文复制引用
出版年
2024
NETL
NSTL
万方数据