A high linearity CMOS power amplifier for NB-IoT communication
In order to meet the requirements of complex NB IoT communication modulation modes for power amplifier output linearity,a high linearity CMOS power amplifier(PA)at 700～900 MHz for NB-IoT communication applications is proposed.In this amplifier,a two-stage topology is adopted,and is operated at class AB amplification state.The self-biased common-source common-gate structure and common-source amplifier structure are adopted at the driver stage and the output power stage,respectively.The driver stage can provide large voltage output swing for the power stage.In order to improve linearity,the diode linearized bias technology is used to improve the gain compression and phase distortion caused by the nonlinearity of the input capacitance of the transistor,and the output 1 dB compression point is increased by 3.2 dB.The circuit layout design is completed by means of 65 nm/1.2 V CMOS technology,and the layout size of the overall amplifier is 0.68 mm×1 mm.The simulation results show that,at 700～900 MHz work frequency band,the small signal gain of the power amplifier is greater than 19 dB,the input reflection coefficient S11 is less than or equal-12 dB,the peak value of power added efficiency(PAE)is 29.6%,and the output 1 dB compression point is 22.7 dBm.The proposed power amplifier circuit has the characteristics of high linearity,low power consumption,and small size,which can effectively meet the application requirements of NB-IoT communication and RF signal power amplification in the 700～900 MHz frequency band.
power amplifierNB-IoT communicationlinearityself-biased common-source common-gate structuregain compression1 dB compression pointPA circuit layout
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维普
