In semiconductor test system, chips are inspected at the tester station. Because of the unsteady of the machines and some other technical issues with respect to products, the inspection results are not so reliable that the chips with quality issues will be treated and re-enter the testers. This phenomenon is defined as quality re-entrance which will influence the throughput and cycle time of the system dramatically. Besides that, the inspection times of the system are not constant but with some stochastic property. For these features, it's difficult to evaluate the system's performance. In this paper, we constructed a Markov model based upon the real semiconductor test system and obtained the throughput and cycle time performances. By the sensitivity analysis of the system, we studied the effects of the quality and the capacity limitation to the system performances and proposed some suggestions on system improvement.
NETL
NSTL
维普
万方数据
