Abstract
Code acquisition is the kernel operation for signal synchronization in the spread-spectrum receiver.To reduce the computational complexity and latency of code acquisition,this paper proposes an efficient scheme employing sparse Fourier transform(SFT)and the relevant hardware architecture for field programmable gate array(FPGA)and application-specific inte-grated circuit(ASIC)implementation.Efforts are made at both the algorithmic level and the implementation level to enable merged searching of code phase and Doppler frequency with-out incurring massive hardware expenditure.Compared with the existing code acquisition approaches,it is shown from theoreti-cal analysis and experimental results that the proposed design can shorten processing latency and reduce hardware complex-ity without degrading the acquisition probability.
基金项目
National Natural Science Foundation of China(61801503)
维普
万方数据