一种基于CMOS的宽带抗阻塞射频接收机设计
Design of a broadband blocker-tolerant RF receiver based on CMOS
杨静致 1翁振豪 1高志强 1王琮2
作者信息
- 1. 哈尔滨工业大学航天学院,黑龙江 哈尔滨 150001
- 2. 哈尔滨工业大学电子与信息工程学院,黑龙江 哈尔滨 150001
- 折叠
摘要
针对在多频段、多模式无线通信应用中传统射频接收机频段单一、集成度低的问题,基于N通道滤波技术与接收机集成化技术,提出一种基于互补金属氧化物半导体(CMOS)的宽带抗阻塞射频接收机.该接收机集成N通道混频器与基带滤波器,在65 nm CMOS工艺下进行版图测试.仿真实验结果表明,该接收机在5 MHz的基带带宽外提供超过60 dB的带外阻塞抑制,频率调谐范围0.25～2.5 GHz;前置内嵌巴伦的低噪声放大器,使接收机转换增益达到46 dB,同时降低整体噪声系数至3.1～4 dB;实现了24.5 dBm的带外三阶交调截取点(IIP3),功耗为26 mW.
Abstract
Aiming at the problem of single frequency band and low integration of traditional RF receivers in multi-band and multi-mode wireless communication applications,a broadband blocker-tolerant RF receiver based on Complementary Metal Oxide Semiconductor(CMOS)with N-path filtering and receiver integration technology is proposed.The receiver integrates an N-path mixer and baseband filter.Layout testing under 65 nm CMOS process shows that the receiver provides more than 60 dB of out-of-band rejection outside of the 5 MHz baseband bandwidth and frequency tuning range of 0.25～2.5 GHz.The front balun's low-noise amplifier achieves a receiver conversion gain of 46 dB while reducing the overall Noise Figure(NF)to 3.1～4 dB.The receiver also achieves 24.5 dBm Out-of-Band Third-order Intercept Point(IIP3)and consumes only 26 mW.
关键词
射频接收机N通道滤波器/低噪声放大器/混频器/抗阻塞Key words
RF receiver N-path filter/low-noise amplifier/mixer/blocker-tolerant引用本文复制引用
基金项目
国家自然科学基金资助项目(NSFC20220286)
出版年
2024
国家科技期刊平台
NSTL
万方数据