In recent years,among oversampling analog-to-digital converters,Sigma-Delta analog-to-digital conver-ters have become the focus of analog-to-digital converters due to their high accuracy.A high-precision and low-power de-sign of Sigma Delta modulator is introduced.Using Matlab tools,the system simulation of a third-order one bit quantized CIFF structure is completed.Guided by the system level simulation results,the integrator adopts a hierarchical structure to optimize the circuit structure.The design of the integrator circuit module adopts a fully differential switched capacitor circuit to suppress the impact of harmonic distortion on output accuracy.The simulation results show that at 5 S/s gear,the lowest significant digit in the corresponding PVT combination is 17.67 bits.At the 2 kS/s gear,the lowest significant bit in the corresponding PVT combination is 15.89 bits,and the power consumption of the entire modulator is less than 3 mW.By improving the overall architecture and integrator structure of the modulator,as well as the design method of the quantizer,the power consumption of the modulator has been reduced and the accuracy of the modulator has been improved.
over-sampled ADCSigma-Delta modulatordouble gearhigh resolutionlow power consumption
NETL
NSTL
万方数据
维普
