Design and Implementation of New Data Synthesis System for TTE
In response to the inability of traditional buses for real-time network transmission,the new bus time triggered Eth-ernet(TTE)is compatible with the IP protocol and IEEE802.3 protocol.However,the TT and BE services require equipment to meet the TTE protocol,which is a problem of lack of applicability in practical engineering..A time triggered Ethernet data synthe-sis system based on FPGA was designed.The data integration system used FPGA as the core controller and gigabit network as the main communication interface.Under the premise of meeting high-speed,high bandwidth,and high flexibility,a data integration module was designed,which is well compatible with various traditional buses and TTE buses.The experimental results show that the system has a synchronization accuracy of up to 40 ns and communication jitter of only 392 ns,and there is no error in data conversion and transmission.At the same time,multiple types of data are mixed for framing,which has extremely high stability and flexibility,providing a reliable solution for TTE network data service in practical engineering.
time triggered Ethernetclock synchronizationprotocol compatibilitydata fusion
万方数据
维普
