仪表技术与传感器2024,Issue(2) :98-103.

基于DSP+FPGA的旋转平台自抗扰控制方法

Active Disturbance Rejection Control Method for Rotary Stage Based on DSP+FPGA

陈玉崇 杨志军 彭皓 谢朝政 谢晓涛 姜传星
仪表技术与传感器2024,Issue(2) :98-103.

基于DSP+FPGA的旋转平台自抗扰控制方法

Active Disturbance Rejection Control Method for Rotary Stage Based on DSP+FPGA

陈玉崇 1杨志军 2彭皓 1谢朝政 1谢晓涛 1姜传星1
扫码查看

作者信息

  • 1. 广东工业大学,精密电子制造技术与装备国家重点实验室
  • 2. 广东工业大学,精密电子制造技术与装备国家重点实验室;佛山市华道超精科技有限公司
  • 折叠

摘要

旋转平台在低速运转过程中易产生非线性摩擦,由于非线性因素的影响,传统PID算法的控制效果远不能满足超精密运动平台定位精度高、响应快速等要求.因此,设计了基于DSP+FPGA的旋转平台自抗扰控制算法(active disturbance rejection control,ADRC),利用扩张状态观测器(extend states observer,ESO)对系统内外部未知扰动进行实时估计并予以补偿,提升系统响应速度,增强鲁棒性与抗干扰能力.最后,通过正弦扫描实验进行验证,PID对正弦输入信号无法及时响应,超调明显;ADRC响应迅速,稳态误差波动小.相比PID,ADRC最大跟踪误差降低79.5%,跟踪误差平均值降低65.4%.

Abstract

The rotary stage is prone to nonlinear friction during low-speed operation.Due to the nonlinear factors,the control effect of traditional PID algorithm is far from meet the requirements of high positioning accuracy and rapid response of ultra-preci-sion motion platform.Therefore,a rotary stage of active disturbance rejection control(ADRC)algorithm based on DSP+FPGA was designed.And then,both internal and external unknown disturbances can be estimated and compensated by extend states observer(ESO)in real-time,improving system response speed and enhancing robustness and anti-interference capability.As a result,a si-nusoidal scanning experiment was carried out.PID had a delayed response to sinusoidal input signals with significant overshoot.ADRC exhibited a rapid response with minimal steady-state error fluctuations.Compared with PID,the maximum tracking error of ADRC is reduced by 79.5%,and the average tracking error is reduced by 65.4%.

关键词

旋转平台/DSP/FPGA/自抗扰控制

Key words

rotary stage/DSP/FPGA/active disturbance rejection control

引用本文复制引用

基金项目

国家自然科学基金项目(U20A6004)

国家重点研发项目(2022YFB4701001)

出版年

2024
仪表技术与传感器
沈阳仪表科学研究院

仪表技术与传感器

CSTPCDCSCD北大核心
影响因子:0.585
ISSN:1002-1841
参考文献量19
段落导航相关论文