Multi-bus Dynamic Reconfiguration Monitoring System Based on FPGA
The traditional multi-bus data monitoring system has some problems,such as low real-time data transmission,high resource consumption and low maintainability.With FPGA as the core,multi-channel RS422,RS232,1553B bus was designed as the communication interface,information recognition,information extraction,data fusion,multi-bus dynamic reconstruction,double redundancy transmission as the main function module,RS422 with dynamic channel rate regulation as the data transmission path,using double redundancy transmission mode.According to the FPGA standardization design idea,the design scheme of multi-bus dynamic reconfiguration monitoring system based on FPGA was proposed.Experimental test results show that the multi-bus dy-namic reconstruction time is less than 1 s at 20℃,60℃and-40℃,and the bit error rate of data transmission is much lower than 0.02%.The system works stably and meets the design requirements.
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