FPGA-based Improved Edge Detection System with Canny Algorithm
Addressing the limitations of the Canny algorithm in image edge detection,such as its poor adaptivity,loss of edge information,and long processing time,this study presented a modular hardware accelerator design based on FPGA to implement the enhanced Canny algorithm for efficient edge detection.Initially,a fast adaptive median filtering algorithm replaced the Gaussian filtering method by using the data parallel processing characteristics of FPGA.Secondly,3×3 templates were introduced as re-placements for the 2×2 templates,and additional computational templates were employed at 45° and 135° orientationsto acquire the gradient and magnitude information of the image.Lastly,in conjunction with the Otsu principle,the triple-threshold connection method was employed to enhance adaptability and mitigate the loss of image edge information.Experimental verification demon-strates that the system exhibits robust adaptive performance,efficiently mitigates image noise,captures significant edge features while ensuring high-speed,real-time and other performance.
万方数据
维普
