Study on the Development and Characterization of High Density Standard Delay Line
Transmission Delay is an important source of testing errors in digital integrated circuits.The traditional method of calibrating a testing system with a single standard delay line can no longer meet the metrological requirements of testing systems with hundreds of test channels.A high-density standard delay line integration and setting method based on microstrip line structure is proposed to meet the demand for efficient and accurate measurement of transmission delay time in testing systems.Four specifications of high-density standard delay lines are designed,achieving high-density integration of 512 standard delay lines on a single specification standard board,improving the portability of standard instruments and improving the measurement efficiency of testing systems;A standard delay line calibration method based on time-domain reflection technology has been designed.Through multiple sets of comparative experiments,the measurement result deviation is less than 50 ps,and the delay line meets the on-site measurement requirements of the testing system.
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