The FPGA software is more and more complex,especially the design of chip-to-chip driver.The chip-to-chip driver testing in programmable logic device testing requirements involves both interface testing and timing testing.But there are many software units and modules in component testing and system testing.The number of interfaces to be tested is large and discrete.Therefore,the test quality of the chip-to-chip driver is usually restricted by the interface excitation design.The common CPU external control interface is usually used in the FPGA design framework.Through establishing the design specification of common CPU external interface verification,the information format and data characteristics of each external input-output interface of the tested module are verified.In this paper,nine kinds of universal CPU external interfaces,such as UART,SSI,IIC,SPI,CAN,EMIF GPMC,LOCAL BUS,PCI are designed.The timing and communication constraints of various interfaces are analyzed,and the corresponding interfaces are simulated by means of QuestaSim simulation platform,and the output waveforms are compared to verify the correctness of the excitation design.
chip-to-chip driverFPGA softwarecommon CPU external interface
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