基于FPGA的SRCNN模型实现
Implementation of SRCNN Model Based on FPGA
邓明 1严承云 2张欢3
作者信息
- 1. 中国电子科技集团公司第三十六研究所,浙江嘉兴 314033
- 2. 浙江大学生物医学工程与仪器科学学院,浙江杭州 310028
- 3. 杭州电子科技大学通信工程学院,浙江杭州 310018
- 折叠
摘要
卷积神经网络图像超分辨率技术(SRCNN)依托神经网络能端对端地实现低分辨率图像到高分辨率图像的重建,但其在实际工程应用中存在计算量大、无法实时实现的问题.设计了一种基于FPGA的去噪神经网络加速优化方法,通过设计卷积计算任务管理器,向卷积核阵列分发计算任务,实现了高效的并行实时计算.还提出了一种Block Ram双端口的访问机制,通过资源复用,降低了存储开销.基于该加速优化技术,搭建了测试平台,实验结果表明,该设计在FPGA主频为250 MHz条件下完成35×100的图像重建平均耗时为70 ms,与OptiPlex 7070相比,速度提升了10倍.
Abstract
Super resolution convolution neural net(SRCNN)relies on neural networks to achieve end-to-end reconstruction from low resolution images to high-resolution images.However,it has the problem of high computational complexity and inability to achieve real-time implementation in practical engineering applications.A denoising neural network acceleration optimization method based on FPGA was designed.By designing a convolutional computing task manager,computing tasks were distributed to the convolutional kernel array,achieving efficient parallel real-time computing.A dual port access mechanism for Block Ram was also proposed,which reduces storage overhead through resource reuse.Based on this acceleration optimization technology,a testing platform was built,and the experimental results showed that the average time required to complete 35×100 image reconstruction under the FPGA main frequency of 250 MHz was 70 ms,which is 10 times faster than OptiPlex 7070.
关键词
卷积神经网络图像超分辨率技术/去噪神经网络/图像重建/现场可编程门阵列Key words
SRCNN/denoising neural network/image reconstruction/FPGA引用本文复制引用
出版年
2024
NETL
NSTL
万方数据