首页|国产数字元器件板级综合测试平台的设计与实现

国产数字元器件板级综合测试平台的设计与实现

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为满足航天产品的高精度、高可靠性需求,实现元器件自主可控,需要对其核心部件乃至关键元器件进行国产化替代及应用适应性验证,设计一种基于FPGA的国产数字元器件板级综合测试平台.该平台兼容CMOS、LVDS等多种数字接口和电压、电流等模拟信号输入接口,可满足不同芯片的输入输出电平标准;内置DDR3 SDRAM进行数据缓存,Flash阵列作为数据存储器,可实现高速实时数据读写及大容量存储;适用于时序逻辑、组合逻辑数字元器件的板级验证,可并行测试多种异构元器件,节约测试成本.最后利用该平台进行器件板级验证测试,实验结果表明:器件板级应用功能正常,动态功耗稳定,在极端环境下工作性能良好,具备较高的工程应用价值.
Design and implementation of domestic digital component board-level comprehensive test platform
To meet the high precision and high reliability requirements of aerospace products and achieve autonomous control of components,it is necessary to domestically replace and validate the application adaptability of core components and even key electron-ic components.In this study,a domestically developed FPGA-based board-level comprehensive testing platform for digital compo-nents is designed.Finally,the platform is utilized for device board-level verification test,and the test results show that the device board-level application function is normal,the dynamic power consumption is stable,and the working performance is good in the ex-treme environment,which has high engineering application value.

FPGAlocalizationdigital componentsBoard level testingDDR3 SDRAM

于海波、李杰、罗飞舟

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中北大学动态测试技术省部共建国家重点实验室,太原 030051

中北大学仪器科学与动态测试教育部重点实验室,太原 030051

中国运载火箭技术研究院宇航业务部结构处,北京 100000

FPGA 国产化 数字元器件 板级测试 DDR3 SDRAM

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619732802021030212241864

2024

自动化与仪器仪表
重庆工业自动化仪表研究所,重庆市自动化与仪器仪表学会

自动化与仪器仪表

CSTPCD
影响因子:0.327
ISSN:1001-9227
年,卷(期):2024.(3)
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