首页|Design and Manufacture of Dual-gate DDSCR with High Failure Current and Holding Voltage
Design and Manufacture of Dual-gate DDSCR with High Failure Current and Holding Voltage
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High-voltage controller area network(CAN)buses have a harsh working environment and require a robust electrostatic discharge(ESD)design window.Thus,ordinary silicon-controlled rectifier(SCR)devices do not satisfy these design requirements.To streamline the design and manufacturing of SCRs,this study proposes a novel dual-gate dual-direction SCR(DG-DDSCR)with a high failure current and holding voltage.First,four polysilicon gates,GateA1,GateA2,GateC1,and GateC2,were introduced to the N+and P+middle regions of the anode and cathode.When the voltage acts on the anode,the electric field generated by the polysilicon gate strengthens the SCR current path while promoting the release of ESD current in the substrate path.Specifically,the holding voltage of the DG-DDSCR and failure current derived from the test results of a transmission line pulse(TLP)are 29.4 V and 16.7 A,respectively.When the clamping voltage was 40 V,the transient current release of the structure can reach 11.61 A,which met the specifications of the CAN bus ESD window and was suitable for the ESD protection of the target application.
High failure currenthigh holding voltageCMOS technologydual-direction SCRgate controlled device
Xingtao Bao、Yang Wang、Yujie Liu、Xiangliang Jin
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School of Physics and Electronics,Hunan Normal University,Changsha 410081,China
Key Laboratory of Physics and Devices in the Post-Moore Era,Hunan Normal University,Changsha 410081,China
School of Integrated Circuits,Peking University,Beijing 100871,China
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