Design and implementation of a high performance wide range phase-locked loop
Using CMOS technology,a high performance,wide range phase-locked loop based on double loop filter is designed.The phase-locked loop circuit includes a frequency discriminator with adjustable delay,a charge pump,a double-loop active filter,a multiband voltage-controlled oscillator and a programmable frequency divider module.Compared with the passive filter structure,the double loop filter structure reduces the filter capacitance area by 3/4,the overall layout area of phase-locked loop is 405 µ m × 480 μ m.After simulation test,the output frequency range of phase-locked loop is 140MHz～1.5GHz,and the overall power consumption is 6.85mW.The flow plate test results of the designed phase-locked loop show that the RMS jitter is 8.92ps when the output frequency is 1.5GHz;When the center frequency is 820MHz,the RMS jitter is 6.01 ps.The test results show that the designed phase-locked loop output frequency can meet the requirements of use.
charge pump phase-locked loopdouble loop filtervoltage-controlled oscillatorprogrammable frequency divider
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