中国物理B(英文版)2024,Vol.33Issue(12) :540-545.DOI:10.1088/1674-1056/ad7c2d

Back-side stress to ease p-MOSFET degradation on e-MRAM chips

于志猛 杨晓蕾 赵晓楠 李艳杰 何世坤 王业伍
中国物理B(英文版)2024,Vol.33Issue(12) :540-545.DOI:10.1088/1674-1056/ad7c2d

Back-side stress to ease p-MOSFET degradation on e-MRAM chips

于志猛 1杨晓蕾 2赵晓楠 2李艳杰 2何世坤 2王业伍3
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作者信息

  • 1. Department of Physics,Zhejiang Province Key Laboratory of Quantum Technology and Device & State Key Laboratory of Silicon Materials,Zhejiang University,Hangzhou 310027,China;Zhejiang Hikstor Technology Co.,Ltd.,Hangzhou 311300,China
  • 2. Zhejiang Hikstor Technology Co.,Ltd.,Hangzhou 311300,China
  • 3. Department of Physics,Zhejiang Province Key Laboratory of Quantum Technology and Device & State Key Laboratory of Silicon Materials,Zhejiang University,Hangzhou 310027,China
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Abstract

The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed to reduce the threshold voltage degradation by utilizing back-side stress.Through the deposition of tensile material on the back side,positive charges generated by silicon-hydrogen bond breakage were inhibited,resulting in a potential reduction in threshold voltage shift by up to 20%.In addition,it was found that the method could only relieve silicon-hydrogen bond breakage physically,thus failing to provide a complete cure.However,it holds significant potential for applications where additional thermal budget is undesired.Furthermore,it was also concluded that the method used in this work is irreversible,with its effect sustained to the chip package phase,and it ensures competitive reliability of the resulting magnetic tunnel junction devices.

Key words

back-side stress/metal-oxide-silicon field-effect transistor(MOSFET)/magnetoresistive random access memory(MRAM)/threshold voltage

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出版年

2024
中国物理B(英文版)
中国物理学会和中国科学院物理研究所

中国物理B(英文版)

CSTPCDEI
影响因子:0.995
ISSN:1674-1056
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