Design of an SLT Testing Hardware System for SOC Chips
This article proposes a new hardware testing system for system-level testing of SOC chips. The new system introduces FPGA as an auxiliary testing chip,uses PC as the medium between the chip sorting machine and the testing hardware for testing,and records the test data. After the introduction of the new hardware system,the existing SOC chips are used as samples to demonstrate the benefits of chip quality control from testing coverage,testing time,and defect analysis.
System chipChip testingHardware designQuality improvement
万方数据
维普
