The open-source instruction set specification RISC-V has modular and highly customizable features,which ena-bles customized instruction sets to be designed according to specific applications or requirements,thereby optimizing perform-ance,saving energy consumption and improving the application adaptability of chips.In order to analyze the requirements of the target scenario and optimize the instruction set design,it is often necessary to analyze the characteristics of the target application in depth based on a simulator.In light of this,the current study proposes a program profiling technique based on the QEMU simu-lator for RISC-V,which collects the program's running information dynamically by binary instrumentation,and combines it with debugging information to mark hotspots at the basic block and function levels.Compared with traditional profiling techniques such as GProf,this technique has the following advantages:firstly,it is independent of hardware platform and operating system,and suitable for the early stage of instruction set design;secondly,it considers the difference between the execution of instructions on the simulator and the real chip,and introduces an instruction estimation cost model to correct the results.In addition,the per-formance analysis technique proposed in this study can also be used to guide program performance optimization and compilation optimization,etc.