首页|Pitfalls for transient response analysis with VF-TLP

Pitfalls for transient response analysis with VF-TLP

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  • NETL
  • NSTL
  • Elsevier
Analyzing transient ESD device behavior with TLP equipment requires more attention for implementation and measurement details than the classical quasi-static TLP approach. Minimizing hardware parasitics reduces the de-embedding effort and optimizes the quality of the voltage and current measurements. We explore different methods and hardware options and highlight potential pitfalls.

ESDVF-TLPTLPTransient response

Smedes, Theo、Coenen, Mart、Sluiter, Sander、Cappon, Paul

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NXP Semicond, Gerstweg 2, NL-6534 AE Nijmegen, Netherlands

EMCMCC, Talmastr 42, NL-4812 KB Breda, Netherlands

2021

10.1016/j.microrel.2021.114309

Microelectronics and reliability

Microelectronics and reliability

EIISTP
ISSN：0026-2714
年,卷(期)：2021.125(Oct.)
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