首页|Patent Issued for Architecture to support tanh and sigmoid operations for infere nce acceleration in machine learning (USPTO 11934965)
Patent Issued for Architecture to support tanh and sigmoid operations for infere nce acceleration in machine learning (USPTO 11934965)
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From the background information supplied by the inventors, news correspondents o btained the followingquote: “Applied Machine Learning (ML) is a booming field t hat utilizes a cascade of layers of nonlinearprocessing units and algorithms fo r feature extraction and transformation with a wide variety of usagesand applic ations. ML typically involves two phases, training, which uses a rich set of tra ining data to traina plurality of machine learning models, and inference, which applies the trained machine learning modelsto actual applications. Each of the two phases poses a distinct set of requirements for its underlyinginfrastructu res. Various infrastructures may be used, e.g., graphics processing unit (GPU), a centralprocessing unit (CPU), a Field Programmable Gate Array (FPGA), an Appl ication Specific IntegratedCircuit (ASIC), etc. Specifically, the training phas e focuses on, as a non-limiting example, GPU or ASICinfrastructures that scale with the trained models and retraining frequency, wherein the key objective oft he training phase is to achieve high performance and reduce training time. The i nference phase, onthe other hand, focuses on infrastructures that scale with th e applications, user, and data, and the keyobjective of the inference phase is to achieve energy (e.g., performance per watt) and capital (e.g., returnon inve stment) efficiency.
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