首页|DC-ORAM: An ORAM Scheme Based on Dynamic Compression of Data Blocks and Position Map

DC-ORAM: An ORAM Scheme Based on Dynamic Compression of Data Blocks and Position Map

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Oblivious RAM (ORAM) is an efficient cryptographic primitive that prevents leakage of memory access patterns. It has been referenced by modern secure processors and plays an important role in memory security protection. Although the most advanced ORAM has made great progress in performance optimization, the access overhead (i.e., data blocks) and on-chip (i.e., PosMap) storage overhead is still too high, which will lead to problems such as low system performance. To overcome the above challenges, in this paper, we propose a DC-ORAM system, which reduces the data access overhead and on-chip PosMap storage overhead by using dynamic compression technology. Specifically, we use byte stream redundancy compression technology to compress data blocks on the ORAM tree. And in PosMap, a high-bit multiplexing strategy is used to achieve data compression for binary high-bit repeated data of leaf labels (or path labels). By introducing the above compression technology, in this work, compared with conventional Path ORAM, the compression rate of the ORAM tree is $52.9\%$, and the compression rate of PosMap is $40.0\%$. In terms of performance, compared to conventional Path ORAM, our proposed DC-ORAM system reduces the average latency by $33.6\%$. In addition, we apply the compression technology proposed in this work to the Ring ORAM system. By comparison, it is found that with the same compression ratio as Path ORAM, our design can still reduce latency by an average of $21.5\%$.

System-on-chipProgram processorsEncryptionRandom access memoryProtectionComputersRedundancyTimingThreat modelingMultiplexing

Chuang Li、Changyao Tan、Gang Liu、Yanhua Wen、Yan Wang、Kenli Li

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College of Computer Science, Hunan University of Technology and Business, Changsha, Hunan, China|Xiangjiang Laboratory, Hunan, China

Shenzhen Institute for Advanced Study, University of Electronic Science and Technology of China, Shenzhen, China

School of Computer Science and Cyber Engineering, Guangzhou University, Guangzhou, China

College of Information Science and Engineering, Hunan University, Hunan, China

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2025

IEEE transactions on computers

IEEE transactions on computers

ISSN:
年,卷(期):2025.74(5)
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