Due to the immaturity of the manufacturing process, numerous faults often occur in through-silicon vias (TSVs). Prebond TSV testing is crucial in enhancing the performance and yield of chiplet-based integrated chips. However, most existing test methods suffer from the test resolution and hard-to-detect weak faults. A novel prebond TSV test method based on the pulse is proposed to improve the test circuit. By introducing pMOS as a driver in pulse detection, TSV leakage faults can be directly tested, thus improving the resolution of leakage faults’ detection. In addition, the range of test pulsewidth to digital code conversion is effectively improved by the ring oscillator (RO) for coarse detection and pulse shrinking for fine detection, avoiding the problem of large overheads that would be brought about by solely increasing the pulse shrinking chain. The results validated by HSPICE simulation show that it can detect open faults, resistive open faults with $R_{\text {open}} \gt $ $0.9~{\mathrm {K}} {\mathrm {\Omega }}$ , leakage faults with $R_{\text {leak}} \lt $ $30~{\mathrm {G}} {\mathrm {\Omega }}$ , and compound faults consisting of resistive open faults and leakage faults.
Xianrui Dou、Huaguo Liang、Zhengfeng Huang、Yingchun Lu、Tian Chen、Maoxiang Yi
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School of Microelectronics, Hefei University of Technology, Hefei, China
Anhui Province Key Laboratory of Affective Computing and Advanced Intelligent Machine, School of Computer and Information, and the Intelligent Interconnected Systems Laboratory of Anhui Province, Hefei University of Technology, Hefei, China
NETL
NSTL
IEEE
