首页|A Model Splitting Approach to Improve Reliability and Accuracy for Alternate Test of Analog/Mixed-Signal Circuits

A Model Splitting Approach to Improve Reliability and Accuracy for Alternate Test of Analog/Mixed-Signal Circuits

扫码查看
Machine learning-based alternate test of analog/mixed-signal integrated circuits (ICs) has been widely studied in the last decade, which has the benefits of simplifying test equipment and decreasing test costs. However, due to low reliability and accuracy, it is hard to adopt the alternate test technique in the industry. In this article, a model splitting approach (MDSP approach) is proposed to improve the reliability and accuracy of the alternate test. The machine learning-based estimation model is “split” into two models with “complementary” performance (a “positive” model and a “negative” model). The “positive” model generates estimations that are no smaller than label values, while the “negative” model outputs estimations that are no larger than label values. Estimations with excessive differences between two models are identified as suspected estimations with large errors and filtered out. The rest results of “complementary” models are averaged to generate the final estimations. By comparing estimations of two models, the estimations with large error are filtered out effectively, and the estimation accuracy is improved significantly by fusing the results of two estimators. The MDSP approach is investigated with data from the commercial analog-to-digital converter and operational amplifier (OP). Results demonstrated that the proposed approach can improve test reliability and accuracy significantly.

ReliabilityAccuracyEstimation errorTrainingPrincipal component analysisMachine learningCostsIntegrated circuit modelingHandsRedundancy

Jiaming Zhao、Naixin Zhou、Shibo Chen、Yijiu Zhao、Guibing Zhu

展开 >

Shenzhen Institute for Advanced Study, University of Electronic Science and Technology of China, Shenzhen, China

School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu, China

2025

IEEE transactions on very large scale integration (VLSI) systems
  • 34