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A Two-Stage CMOS Amplifier With High Degree of Stability for All Capacitive Loads
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NETL
NSTL
IEEE
This article presents the conception, design, and realization of a fully differential two-stage CMOS amplifier, that is, unconditionally stable for any value of the capacitive load. This is simply achieved by sending a scaled replica of the output stage current to the amplifier virtual ground in order to create a left half-plane (LHP) zero in the loop gain that either cancels or tracks the output pole in all process, voltage, and temperature (PVT) conditions. Consequently, from a stability point of view, the amplifier behavior resembles that of a single-pole OTA. Starting from an existing two-stage gain-programmable amplifier, designed in a 0.18- $\mu $ m bipolar-CMOS-DMOS (BCD) process that was able to drive only 10 pF without encountering into stability issues, a simple circuit has been added to extend the stability to any capacitive load value. An interesting and unusual method, based on the frequency behavior of the unloaded closed-loop amplifier output impedance, has been introduced to further verify the unconditional stability of this solution. Measurements show a high degree of stability in any load conditions. In the used 0.18- $\mu $ m BCD technology, silicon area and current consumption of the extra circuit are only 0.0004 mm2 and $2~\mu $ A, respectively, with a 5-V power supply.
Circuit stabilityCapacitorsStability criteriaThermal stabilityPoles and zerosCapacitanceTransconductanceSiliconIntegrated circuit modelingVery large scale integration
Germano Nicollini、Alessandro Bertolini
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Department of Research and Development, STMicroelectronics Srl, Cornaredo, Italy
NETL
NSTL
IEEE
