A Low-Power Cascade-Expandable Electrical Stimulation IC
A low-power cascade-expandable electrical stimulation circuit which mainly consists of 16 independent electrical stimulation channels,a global digital controller(GDC)and a current bias module was designed.Each independent electrical stimulation channel includes an 8 bit digital to analog converter(DAC),a high-voltage stimulation front-end(SFE)circuit and a channel local digital control-ler(LDC),which can output monopolar biphasic pulse stimulation currents with independently configu-rable pulse amplitude,width and phase interval.The GDC controls the configuration and stimulation enabling of the 16 channels and has a control interface for cascading and expanding multi-chips.The LDC and GDC share the same set of clock/data control signals,saving port resources.The proposed circuit was designed and fabricated using GF 0.18 pm CMOS BCD high-voltage process,with a total area of 1.5 mm×3.1 mm.The test results show that under the 5 V/15 V/-15 V power supplies,the circuit has a static power consumption of 2.14 μW,a maximum output current of 1 mA and a compliance voltage of 13.5 V at 200 μA constant current output.
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维普
