首页|面向高密度数字SiP应用的封装工艺研究

面向高密度数字SiP应用的封装工艺研究

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面向高密度数字系统级封装(SiP)应用,采用多芯片一体化封装技术,在系统内部集成了数字信号处理器(DSP)以及外围的DDR3、SPI Flash、Nor Flash、Nand Flash、低压差稳压器(LDO)等多颗芯片,并基于高密度陶瓷封装基板及表面多层薄膜工艺实现了各芯片之间的高速互连.此外,利用无硅通孔转接板工艺完成了 DDR芯片从引线键合到倒装的封装形式的重构,在保证传输距离的同时也保证了芯片封装尺寸的最小化.在35 mm×40 mm的封装尺寸内实现了一个具备数字信号处理功能的最小系统.所涉及到的技术为通用基础技术,可广泛应用于其他高密度封装产品中.
Research on the Packaging Process of High-Density Digital SiP Applications
For high-density digital system in packaging(SiP)applications,adopting the multi-chip integrated packaging technology,and the digital signal processor(DSP)and peripheral DDR3,SPI Flash,Nor Flash,Nand Flash,and low-dropout linear regulator(LDO)chips are integrated in the system,and the high speed interconnection between the chips is realized based on the high-density ceramic packaging substrate and the surface multi-layer thin film process.In addition,the reconfiguration of the DDR chip from wire bonding to flip chip packaging has been completed by using the non-silicon through via interposer process,which ensures the transmission distance while minimizing the chip packaging size.A minimal system with digital signal processing functions is realized within a packaging size of 35 mm×40 mm.The technologies involved are general basic technologies that can be widely used in other high-density packaging products.

ceramic substratemulti-layer thin filmpackaging reconfiguration

柴昭尔、卢会湘、徐亚新、李攀峰、王杰、田玉、王康、韩威、尹学全

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中国电子科技集团公司第五十四研究所,石家庄 050081

通信软件与专用集成电路设计国家工程研究中心,石家庄 050081

中华通信系统有限责任公司河北分公司,石家庄 050200

石家庄诺通人力资源有限公司,石家庄 050035

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陶瓷基板 多层薄膜 封装重构

2025

电子与封装
中国电子科技集团公司第五十八研究所

电子与封装

影响因子:0.206
ISSN:1681-1070
年,卷(期):2025.25(1)