Low-Voltage High-Gain LDO Design Using Cross-Coupled Error Amplifier
An LDO with a low input voltage and a high gain is designed.The error amplifier adopts a cross-coupled structure to increase the loop gain,and a left half-plane zero is introduced by the series connection of a Miller capacitor and a nulling resistor to ensure the frequency response loop stability of the circuit.The 0.35 μm standard CMOS process is used for simulation with an input voltage of 1.5 V and a maximum load current of 100 mA.Simulation results show that the constructed LDO can stabilize the output voltage at 1.2 V,and the low-frequency gain of the loop is as high as 122 dB under the light load,with a chip area of 0.196 mm2.The phase margin under the heavy load can also be greater than 58°,with a quiescent current of 21.2 μA.Due to the employment of the cross-coupled error amplifier,the circuit's accuracy is greatly improved,and the load regulation can reach 0.007％.The designed LDO is of great value in regard of application.
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