基于OpenLane的专用集成电路设计工具

Research on ASIC design tool based on OpenLane

王建新 ¹许弘可 ¹郑玉崝 ¹肖超恩 ¹张磊 ¹陈欣¹

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作者信息

1. 北京电子科技学院电子与通信工程系,北京 100070
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摘要

提出一种基于OpenLane的专用集成电路(ASIC)设计工具的设计方案.以Gambas开发环境为基础,利用插件技术实现对OpenLane工具链的集成,完成基于OpenLane的ASIC设计工具,即EasyASIC.该工具涵盖工程管理、代码编辑、Verilog 代码的编译、仿真、OpenLane 初始化文件的配置、GDSII 文件的生成、GDS2D 和GDS3D显示等功能,从而实现ASIC设计的自动化.以 32 bit有符号乘法器为例,对该工具进行功能验证测试.实验结果表明,EasyASIC能够在国产Deepin操作系统下流畅运行,实现 32 bit有符号乘法器从寄存器传输级文件描述向GDSII文件的转换,该工具有很强的操作性和易用性,对于提升我国集成电路设计工具软件产业水平具有一定的参考意义.

Abstract

This paper firstly proposed a design scheme of application specific integrated circuit(ASIC)design tools based on OpenLane.Secondly,based on Gambas development environment,plug-in tech-nology was used to integrate OpenLane toolchain,and completed OpenLane-based ASIC design tool,namely EasyASIC.The tool covers engineering management,code editing,Verilog code compilation,simulation,OpenLane initialization file configuration,GDSII file generation,GDS2D and GDS3D display to achieve ASIC design automation.Finally,taking the 32 bit signed multiplier as an example,the function verification test of this tool was carried out.The experimental results show that EasyASIC can run smoothly in the domestic Deepin operating system,and realize the transformation of 32 bit signed multiplier from register transfer level file description to GDSII file.The tool has strong operability and ease of use,and has certain reference significance for improving the development of Chinese integrated circuit design tool software industry.

关键词

集成电路设计工具/专用集成电路/OpenLane/Gambas

Key words

ASIC design tool/application specific integrated circuit(ASIC)/OpenLane/Gambas

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基金项目

教育部新工科研究与实践项目(E-AQGABQ20202704)

出版年

2024

福州大学学报(自然科学版)

福州大学

福州大学学报(自然科学版)

CSTPCD北大核心

影响因子：0.35

ISSN：1000-2243

参考文献量4

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