Fault Analysis and Simulation in Interface Signal Design
In the development of some products in Telemetry system,two FPGA software failures were encountered.Each fault is located at the unreasonable interface signal design when two different FPGA software work together.In order to solve the problem of unreasonable interface signal design,simulation tools are used to satisfy the co-simulation of different software.Specialized simula-tion on the timing of interface signals between two software is conducted.The fault of the interface signal is clearly identified through this method and effective improvement measures have been proposed.Compared with the method of measuring signals using an oscil-loscope,this method is more efficient and convenient.The results indicate that the co-simulation of two different software could per-fectly show the timing of interface signals and optimize the design process.Now this method has been used as a necessary process for designing interface signals between modules to improve the reliability of product design.
telemetry systemfault analysissimulationinterface signal
NETL
NSTL
万方数据
