Verification Platform for On-chip-network Router Based on UVM
A router is a key component of on-chip network,and its performance has an important impact on the performance of whole network.For the functional verification of the on-chip-network router,a verification platform based on the universal verifica-tion methodology(UVM)is constructed by using the SystemVerilog and automation scripts,simplifying the verification process.In the verification platform,the router's functionality is adequately verified,which sends the constrained random excitation and direc-tional testing sequence to each port of the router by dividing multiple agents,and multiple independent test cases are built to fully veri-fy the functionality of the router.Verification process is quantified by applying the coverage-driven strategies.According to the design requirements of the router,coverage groups and cross-coverage groups are written to collect the coverage data.This verification plat-form is already applied in the verification of AI chips,and the components and test cases in the platform can be achieved the reuse at a higher level.In addition,the system achieves the goal of 100％functional coverage and 95.6％code coverage through the joint sim-ulation of VCS and Verdi.
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