Fractional Frequency Divider Based on Dithered Delta-sigma Modulator
Based on the dithered Delta-sigma modulator,in this paper a wide-band fractional frequency divider with dynamic division ratio is analyzed and designed.The integer frequency divider is composed of high-speed divide-by-2 frequency divider and 7-stage 2/3 frequency divider chain cascade,and the fraction control circuit is composed of the Delta-sigma modulator with an ad-ditive dither signal.Theoretical analysis and simulation show that,selecting the adding position of the dither signal appropriately can extend the output sequence length effectively,so as to smooth the output spectrum of the Delta-sigma modulator.The divider is manufactured by TPS 65 nm radio-frequency silicon-on-insulator(RFSOI)complementary metal oxide semiconductor(CMOS)process,and the chip area including the pad is 0.57 mm2.The measured results show that the maximum operating current of the fractional frequency divider chain is 22.2 mA with the supply voltage of 1.2 V.The chip can dynamically load the control word and realize the function of frequency division with the input frequency at the range from 9 GHz to 20 GHz.
wide-band2/3 frequency dividerditherDelta-sigma modulator
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